AMD K7- Interview by Leonard "Viking1" Hjalmarson
	AMD's K7 CPU is already in production although only three motherboard manufacturers (ASUS, GigaByte and FIC) are currently producing slot-A based motherboards for the K7. At last report the three chipsets that support the new CPU (from VIA, SiS and ALI) weren't yet stable or mature enough. This means that the only working chipsets were actually made in house by AMD's own engineers. According to SharkyExtreme, the first round of motherboards for the K7 will probably be anchored by an AMD chipset. K7 Features A deeply pipelined nine-issue superscalar microarchitecture optimized for high clock frequency A superscalar pipelined floating point unit 128KB of on-chip level one (L1) cache A programmable high-performance backside L2 cache interface from 512K to 8 MB 200 MHz Alpha EV6 compatible system bus interface with support for scalable multiprocessing. Initial speed 550-600mhz 200mhz bus speed 128kb of on-chip level 1 cache Slot A Identical to Slot 1 though not compatible in existing Pentium II motherboards We fielded a brief interview to AMD this past week so that we could provide you with new information. Q: The K7 is the first AMD part that will allow configuration for SMP. Not only will this make it possible to build powerful servers, but gaming under WIN2000 with multithreaded apps will become appealing. Are there specific advantages to the K7 architecture over the PIII for symetrical multiprocessing? A: The big advantage is a direct connection between the CPU (or multiple CPUs) and the system bus. This means that in a MP configuration, each processor can access the system bus at full speed (200MHz) and they do not have to share access to the bus. The K7 bus is based on the EV6 bus created by Digital for its Alpha processors. The EV6 bus was designed for MP environments. Q: How soon can we expect to see dual processor mainboards for the K7? When chipsets that support MP implementations are available. ;) We have not given a timeline on this one, only said that it is in the works. Stay tuned.... Click to continue		Q: The overhead for dual processors has sometimes mitigated the advantages under Intels architecture. Will the K7 recover any of that loss? No shared access to the system bus should do a good job. See above. Because the K7 bus is based on the Digital EV6 bus we have a lot of potential when it comes to MP configurations. Q: The K7 is the first server type part marketed by AMD. How much of Intel's market share does AMD hope to take with this unit? We haven't broken it down per market segment ever. We have a goal of 30% market share by 2001. Q: How much did gamers figure in the development plan for the K7? How much do they figure in AMD's marketing plan? Since the K7 will be the industry's first 7th generation processor (with performance planned to match that positioning) we are really targeting PC enthusiasts at launch. These are the people who want the highest performing system available. Obviously, the high-end gamer fits into this mold quite nicely. Q: The EV6 bus can run up to 200 MHz. Is there any memory available that can run that fast yet? If not, when can we expect to see parts at that speed? What is available now? There are really two questions here. What are the next-generation memory technologies that operate at faster speeds, and when will the K7 platform support those technologies. We haven't said anything yet about what memory technologies we will support, either initially or later. One caveat, the 200Mhz bus still runs at 200Mhz between the CPU and chipset ---- regardless of what memory technology is supported. Q: The PIII 550 is being successfully overclocked to 5.5x 112. Will there be any headroom for overclocking on the K7 550? We don't endorse overclocking (it voids the warranty) so I can't offer any insight into this one. Go to Page Two
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